Tag Archives: RISC

Instruction Sets – RISC and CISC

Instruction set design includes opcode and operand specifications. Two basic categories of Instruction Set or Instruction Set Architecture are:

Reduced Instruction Set Computers(RISC)

For faster execution of instructions, instructions should be fewer in number so that they make less use of memory. The type of computers using fewer instructions and executing them at faster speed are called Reduced Instruction Set Computers.

RISC Characteristics

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